TC358870各个工作模式驱动配置

#include “tc358870_cfg.h“
#include “stm32_delay.h“
#include “stdio.h“



void tc358870_Startup（void）
{
  u8 Sys_Status=0;
  // Initialization to receive HDMI signal				
  // Software Reset				
  stm32_I2C_Write_16bit（0x00040x0004）; // ConfCtl0				
  stm32_I2C_Write_16bit（0x00020x3F01）; // SysCtl				
  stm32_I2C_Write_16bit（0x00020x0000）; // SysCtl				
  stm32_I2C_Write_16bit（0x00060x0008）; // ConfCtl1				
  // DSI-TX0 Transition Timing				
  stm32_I2C_Write_32bit（0x01080x00000001）; // DSI_TX_CLKEN				
  stm32_I2C_Write_32bit（0x010C0x00000001）; // DSI_TX_CLKSEL				
  stm32_I2C_Write_32bit（0x02A00x00000001）; // MIPI_PLL_CONTROL				
  stm32_I2C_Write_32bit（0x02AC0x000090BD）; // MIPI_PLL_CNF				
  Delay_ms（1）;				
  stm32_I2C_Write_32bit（0x02A00x00000003）; // MIPI_PLL_CONTROL				
  stm32_I2C_Write_32bit（0x01180x00000014）; // LANE_ENABLE				
  stm32_I2C_Write_32bit（0x01200x00001770）; // LINE_INIT_COUNT				
  stm32_I2C_Write_32bit（0x01240x00000000）; // HSTX_TO_COUNT				
  stm32_I2C_Write_32bit（0x01280x00000101）; // FUNC_ENABLE				
  stm32_I2C_Write_32bit（0x01300x00010000）; // DSI_TATO_COUNT				
  stm32_I2C_Write_32bit（0x01340x00005000）; // DSI_PRESP_BTA_COUNT				
  stm32_I2C_Write_32bit（0x01380x00010000）; // DSI_PRESP_LPR_COUNT				
  stm32_I2C_Write_32bit（0x013C0x00010000）; // DSI_PRESP_LPW_COUNT				
  stm32_I2C_Write_32bit（0x01400x00010000）; // DSI_PRESP_HSR_COUNT				
  stm32_I2C_Write_32bit（0x01440x00010000）; // DSI_PRESP_HSW_COUNT				
  stm32_I2C_Write_32bit（0x01480x00001000）; // DSI_PR_TO_COUNT				
  stm32_I2C_Write_32bit（0x014C0x00010000）; // DSI_LRX-H_TO_COUNT				
  stm32_I2C_Write_32bit（0x01500x00000160）; // FUNC_MODE				
  stm32_I2C_Write_32bit（0x01540x00000001）; // DSI_RX_VC_ENABLE				
  stm32_I2C_Write_32bit（0x01580x000000C8）; // IND_TO_COUNT				
  stm32_I2C_Write_32bit（0x01680x0000002A）; // DSI_HSYNC_STOP_COUNT				
  stm32_I2C_Write_32bit（0x01700x00000478）; // APF_VDELAYCNT				
  stm32_I2C_Write_32bit（0x017C0x00000081）; // DSI_TX_MODE				
  stm32_I2C_Write_32bit（0x018C0x00000001）; // DSI_HSYNC_WIDTH				
  stm32_I2C_Write_32bit（0x01900x00000104）; // DSI_HBPR				
  stm32_I2C_Write_32bit（0x01A40x00000000）; // DSI_RX_STATE_INT_MASK				
  stm32_I2C_Write_32bit（0x01C00x00000015）; // DSI_LPRX_THRESH_COUNT				
  stm32_I2C_Write_32bit（0x02140x00000000）; // APP_SIDE_ERR_INT_MASK				
  stm32_I2C_Write_32bit（0x021C0x00000080）; // DSI_RX_ERR_INT_MASK				
  stm32_I2C_Write_32bit（0x02240x00000000）; // DSI_LPTX_INT_MASK				
  stm32_I2C_Write_32bit（0x02540x00000006）; // LPTXTIMECNT				
  stm32_I2C_Write_32bit（0x02580x00240204）; // TCLK_HEADERCNT				
  stm32_I2C_Write_32bit（0x025C0x000D0008）; // TCLK_TRAILCNT				
  stm32_I2C_Write_32bit（0x02600x00140006）; // THS_HEADERCNT				
  stm32_I2C_Write_32bit（0x02640x00004268）; // TWAKEUPCNT				
  stm32_I2C_Write_32bit（0x02680x0000000F）; // TCLK_POSTCNT				
  stm32_I2C_Write_32bit（0x026C0x000D0008）; // THS_TRAILCNT				
  st