用cadence画的ARM+FPGA的核心板原理图，ARM上挂网口，串口

用cadence画的ARM+FPGA的核心板（原理图），ARM上挂网口，串口

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     目录           0  2014-10-30 23:13  Circuit\
     文件        8959  2013-11-11 14:10  Circuit\ZHUKONG.DRC
     文件      443392  2013-11-27 17:19  Circuit\ZHUKONG.DSN
     文件      443392  2013-11-27 17:14  Circuit\ZHUKONG_0.DBK
     目录           0  2014-10-30 23:13  Circuit\allegro\
     文件       23419  2013-11-27 17:14  Circuit\allegro\netlist.log
     文件       86285  2013-11-27 17:14  Circuit\allegro\pstchip.dat
     文件       86287  2013-11-18 10:13  Circuit\allegro\pstchip.dat1
     文件       86285  2013-11-20 13:47  Circuit\allegro\pstchip.dat2
     文件       86285  2013-11-27 17:12  Circuit\allegro\pstchip.dat3
     文件      151818  2013-11-27 17:14  Circuit\allegro\pstxnet.dat
     文件      152540  2013-11-18 10:13  Circuit\allegro\pstxnet.dat1
     文件      152540  2013-11-20 13:47  Circuit\allegro\pstxnet.dat2
     文件      152540  2013-11-27 17:12  Circuit\allegro\pstxnet.dat3
     文件       51821  2013-11-27 17:14  Circuit\allegro\pstxprt.dat
     文件       51822  2013-11-18 10:13  Circuit\allegro\pstxprt.dat1
     文件       51821  2013-11-20 13:47  Circuit\allegro\pstxprt.dat2
     文件       51821  2013-11-27 17:12  Circuit\allegro\pstxprt.dat3
     文件        3352  2013-11-27 17:14  Circuit\allegro\pxlBA.txt
     文件        7672  2013-11-28 11:15  Circuit\zhukong.opj